Physics of Semiconductor Devices – fourth edition

Physics and Properties of Semiconductors – A Review

Introduction
Crystal Structure
- Primitive Cell and Crystal Plane
  - Fig. 1- Some Important primitive cells
  - Fig. 2- Miller indices of some important planein cubic crystal
  - Table 1 – Miller Indices and Their Represented Plane
- Reciprocal Lattice
  - eqn(1) to eqn(4)
Energy bands and Energy Gap
- Fig. 3- Brillouin zones
- eqn(5) to eqn(7)
- Table 2 – Brilloun Zoneof fee, Diamond
- Fig. 4- Energy-band structures
  - eqn(8) to eqn(10)
Carrier Concentration at Thermal Equilibrium
- Fig. 7- Three basic bond pictures of semiconductor
- Carrier Concentration and Fermi Level**
  - eqn(11) to eqn(22)
  - Fig. 8 – Fermi-Dirac integral F_1/2 as a function of Fermi Energy
- Degenerate Semiconductors
  - eqn(23a) and eqn(23b)
- Intrinsic Concentration
  - eqn(24) to eqn(26)
  - eqn(27a) and eqn(27b
- Donors and Acceptors
  - Fig. 9 – Intrinsic carrier concentration of Si and GaAs
    - eqn(28) to eqn(30)
- Calculation of Fermi Level
  - eqn(31)
  - Fig. 10 – Measured ionization energies for various impurities
  - Fig. 11 – Schematic band diagram densityof states
  - eqn(32) to eqn(41)
  - Fig. 12 – A graphical method to determine the Fermi energy level
  - Fig. 13 – Electron density as a function of temperature for a Si sample with donor impurity
  - Fig. 14 – Fermi level for (a) Si and (b) GaAs as a function of temperature and impurity concentration
    - eqn(39) to eqn(44)
    - Carrier-transport Phenomena
  - Drift and Mobility
    - eqn(45) to eqn(50)
    - Fig. 15 – Drift Mobilities of (a) Si
    - Phonon, Optical and Thermal Properties
    - Heterojunctions and Nanostructures
    - Basic Equations and Examples
  - Resistivity and Hall Effect
    - eqn(51)
    - Fig. 16 – Mobility of Electron and holes in Si as a function of temperature
    - Fig. 17 – Electron (circles) and holes (square) mobility versus bandgap for direct
      - eqn(52) and eqn(53)
        
        Fig. 18 – The correction factor for the measurement of the resistivity
        
        Fig. 19 – Resistivity versus impurity concentration for (a) Si and (b) GaAs
    - Hall Effect
      - Fig. 20 – Basic setup to measure carrier concentration using the Hall effect
        
        eqn(54) to eqn(60)
  - High-electric-Field Properties
    - eqn(61) to eqn(64)
    - Fig. 21 – The measured carrier velocity Vs electric field for high-purity Si and GaAs
    - eqn(65) to eqn(69)
  - Recombination, Generation and Carrier Lifetimes
    - eqn(70) and eqn(71)
    - eqn(72a) and eqn(72b)
    - Fig. 24 – Ionization rates at 300K
    - Fig. 25 – Electron ionization rate versus the reciprocal electric field in Si
    - Fig. 26 – Recombination processes
    - eqn(73) to eqn(88)
    - eqn(89a) and eqn(89b)
    - eqn(90) to eqn(95)
  - Diffusion
    - eqn(96) to eqn(99)
    - eqn(100a) and eqn(100b)
    - eqn(101)
  - Thermionic Emission
    - eqn(102) to eqn(103)
  - Tunneling
    - eqn(104) to eqn(107)
  - Space-Charge Effect
    - eqn(108) to eqn(113)
- Phonon, Optical and Thermal Properties
  - Phonon Spectra
    - eqn(114)
  - Optical Properties
    - eqn(115) to eqn(124)
  - Thermal Properties
    - eqn(125) to eqn(129)
- Heterojunctions and Nanostructures
  - Heterojunctions
    - eqn(130) to eqn(140)
- Basic Equations and Examples
  - Basic Equations
    - The Poisson Equation
      - eqn(141) to eqn(148)
    - Current-Density Equation
      - eqn(149a) and eqn(149b)
      - eqn(150)
      - eqn(151a) and eqn(151b)
    - Continuity Equations
      - eqn(152a) and eqn(152b)
      - eqn(153a) and eqn(153b)
    - Lattice Temperature Equation
      - eqn(154) and eqn(155)
  - Examples
    - Decay of Excess Carriers with Time
      - eqn(156) to eqn(158)
      - Fig. 44 – Decay of photo-excited carriers
      - eqn(159)
    - Decay of Excess Carriers with Distance
      - eqn(160) to eqn(163)
      - Fig. 45 – Steady State carrier injection from one side
    - Decay of Excess Carriers with Time and Distance
      - eqn(164) and eqn(165)
      - Fig. 46 – Transient and steady-state carrier diffusion
    - Surface Recombination
      - eqn(166) to eqn(168)
      - Fig. 47 – Surface recombination at x = 0
    - Problems 1 to 36
p-n junctions
- Introduction
- Deplection region
  - Abrupt Junction
    - Built-In Potential and Depletion-Layer Width
      - eqn(1)
      - Fig. 1 – An abrupt p-n junction in thermal equilibrium
      - eqn(2) to eqn(8)
      - eqn(9a) and eqn(9b)
      - eqn(10)
      - eqn(11a) and eqn(11b)
      - eqn(12) to eqn(16)
      - eqn(17a) and eqn(17b)
      - eqn(18) and eqn(19)
      - eqn(20a) and eqn(20b)
      - eqn(21)
      - eqn(22a) and eqn(22b)
      - eqn(23) to eqn(25)
    - Depletion-Layer Capacitance
      - eqn(26) to eqn(28)
      - eqn()**
      - Fig. 2 – Depletion layer width and depletion-layer capacitance per unit area as a function of net potential
        
        eqn(27) and eqn(28)
      - Fig. 3 – A 1/C²-V plot can yield the built-in potential and doping density N
        
        eqn(29) to eqn(31)
      - Linearly Graded Junctions
        
        Fig. 4 – The Debye length in Si at room temperature
        
        eqn(32) to eqn(34)
        
        Fig. 5 – A linearily graded junction in thermal equilibrium
        
        eqn(35) to eqn(39)
        
        Fig. 6 – Gradient voltages for linearity graded junctions in Si and GaAs
        
        Fig. 7 – The depletion layer width and depletion layer capacitance per unit area
      - Arbitrary Doping Profile**
        
        eqn(40) and eqn(41)
        
        Fig. 8 – A p-n junction with different doping profiles in thermal equilibrium
        
        eqn(42) to eqn(46)
      - Current-Voltage Characteristic
        
        Ideal Case– – Shockley Equation
        
        eqn(47a) and eqn(47b)
        
        eqn(48a) and eqn(48b)
        
        eqn(50) to eqn(52)
        
        Fig. 9 – An energy-band diagram, with Fermi-levels for electrons and holes
        
        eqn(53)
        
        eqn(54a) and eqn(54b)
        
        eqn(55a) and eqn(55b)
        
        eqn(56) to eqn(60)
        
        eqn(61a) and eqn(61b)
        
        eqn(62) and eqn(63)
        
        Fig. 10 – Carrier distribution and current densities
        
        Fig. 11 – Ideal current-voltage charateristics
        
        eqn(64)
        
        Generation-Recombination Process
        
        eqn(65) to eqn(68)
        
        Fig. 12 – Current-Voltage characteristic of a practical Si diode
        
        eqn(69) to eqn(74)
        
        High-Injection Condition
        
        eqn(75)
        
        Fig. 14 – Carrier concentrations and energy-band diagrams for a Si p⁺–n junction
        
        Diffusion Capacitance**
        
        eqn(76) to eqn(87)
        
        Junction breakdown
        
        Thermal Instability
        
        Fig. 15 – Normalized diffusion conductance and diffusion capacitance versus 𝜔𝜏
        
        Tunneling
        
        eqn(88)
        
        Fig. 16 – Reverse current-voltage characteristic of thermal berakdown
        
        Fig. 17 – Energy band diagrams showing breakdown mechanism
        
        Avalanche Multiplication
        
        eqn(89) to eqn(94)
        
        eqn(95a) and eqn(96b)
        
        eqn(96) to eqn(102)
        
        Edge Effects
        
        eqn(103) to eqn(107)
        
        Fig. 23 – Normalized avalanche breakdown voltage versus lattice temperature
        
        Fig. 24 – A planar diffusion or implantation process form a junction curvature
        
        Transient Behavior and Noise
        
        Transient Behavior
        
        Fig. 26 – Transient behavior of a p-n junction
        
        eqn(108) to eqn(117)
        
        Noise
        
        Fig. 27 – Normalized time versus the ratio of reverse current to forward current
        
        eqn(118) to eqn(121)
        
        Terminal Functions
        
        Rectifier
        
        eqn(122) to eqn(126)
        
        Zener Diode
        
        Varistor
        
        Varactor
        
        eqn(127)
        
        Fig. 28 – Various impurity distribution(normalized at x_o)
        
        eqn(128) to eqn(130)
        
        Fast-Recovery Diode
        
        Fig. 29 – A plot of the normalized measured capacitance versus gate voltage
        
        Charge-Storage Diode
        
        p-i-n Diode
        
        eqn(131)
        
        Fig. 30 – The simulated p-i-n diode with uniform doping profiles in thermal equilibrium
        
        eqn(132) and eqn(133)
        
        Heterojunctions
        
        Anisotype Heterojunction
        
        Fig. 31 – Typical RF resistance as a function of dc forward current
        
        eqn(134a) and eqn(134b)
        
        Fig. 32 – Energy-band diagrams for (a) two isolated semiconductor of opposite type
        
        eqn(135) and eqn(136)
        
        eqn(137a) and eqn(137b)
        
        eqn(138) and eqn(139**)
        
        Isotype Heterojunction**
        
        eqn(140) to eqn(145) **
        
        Fig. 33 – Energy-band diagrams for ideal (a) n-n and (b) p-p isotype heterojunctions
        
        Problems 1 to 23
        
        Metal-Semiconductor Contacts
        
        Formation of Barrier
        
        Introduction
        
        Ideal Condition
        
        Fig 1 – Energy-band diagram of metal-semiconductor contacts
        
        eqn(1) to eqn(3)
        
        Fig 2 – Metal workfunction for a clean surface in a vacuum atomic number
        
        Depletion Layer
        
        eqn(4) and eqn(5)
        
        Fig 3 – Energy-band diagram of metal on n
        
        eqn(6) to eqn(11)
        
        Interface States
        
        eqn(12)
        
        Fig. 5 – Detailed energy-band diagram
        
        eqn(13) to eqn(26)
        
        Image-Force Lowering**
        
        eqn(27) to eqn(36)
        
        Fig. 13 – An energy-band diagram incorporating the Schottky effect
        
        Barrier-Height Adjustment
        
        Fig. 15 – Idealized controlled barrier conctact
        
        eqn(37) to eqn(42)
        
        Current Transport Processes
        
        Fig. 18 – Five basic transport processes under forward bias
        
        Thermionic-Emission Theory**
        
        eqn(43) to eqn(64)
        
        Diffusion Theory
        
        eqn(65) to eqn(72)
        
        Thermionic-Emission-Diffusion Theory**
        
        eqn(73) to eqn(78)
        
        Fig. 19 – An energy band diagram incorporating the Schottky effect
        
        eqn(79) to eqn(85)
        
        Tunneling Current**
        
        eqn(86) and eqn(87)
        
        Fig. 21 – Theoretical and experimental current-voltage charateristic
        
        Fig. 22 – Saturation current density versus doping concentration
        
        Fig. 23 – The ratio of tunneling current component
        
        Fig. 24 – Energypband diagrams showing qualitatively tunneling currents in a Schottky diode
        
        eqn(88) to eqn(96)
        
        Minority-Carrier Injection
        
        eqn(97) to eqn(100)
        
        Fig. 25 – An Energy-band diagram of an epitaxial Schottky barrier
        
        eqn(101) to eqn(106)
        
        MIS Tunnel Diode
        
        eqn(107) to eqn(109)
        
        Measurement of Barrier Height
        
        Current-Voltage Measurement
        
        eqn(110) to eqn(115)
        
        Activation-Energy Measurement
        
        eqn(116)
        
        Capasitance-Voltage Measurement
        
        eqn(117)
        
        Photoelectric Measurement
        
        Fig. 33 – 1/C² versus applied voltage
        
        eqn(118) and eqn(119)
        
        Measured Barrier Heights
        
        Device Structures
        
        Fig. 36 – Barrier heights on n-type Si and GaAs
        
        Fig. 37 – Various metal-semiconductor device structure
        
        eqn(120) to eqn(125)
        
        Fig. 42 – A plot of small-signal equivalent circuit of a Schottky diode
        
        Ohmic Contact
        
        eqn(126) to eqn(129)
        
        Fig. 43 – Dependence of specific contact resistance on doping concentration
        
        eqn(130) to eqn(132)
        
        Problems 1 to 13
        
        Metal-Insulator-Semiconductor Capacitors
        
        Introduction
        
        Ideal MIS Capacitor
        
        eqn(1a)
        
        Fig. 1 – An Illustration of a MIS capacitor
        
        Fig. 2 – Energy-band diagram of ideal MIS capacitor at equilibrium
        
        Fig. 3 – Energy-band diagram for ideal MIS capacitor under different bias
        
        eqn(1b)
        
        Surface Space-Charge Region
        
        eqn(2) to eqn(4)
        
        eqn(5a) and eqn(5b)
        
        eqn(6a) and eqn(6b)
        
        eqn(7) to eqn(22)**
        
        Fig. 5 – Variation of space-charge density in the semiconductor
        
        Ideal MIS Capacitance Curves
        
        eqn(23)
        
        Fig. 6 – (a) A band diagram of an ideal MIS Capacitor under strong inversion
        
        eqn(24) to eqn(27)
        
        Low-Frequency Capacitance
        
        eqn**(28)
        
        Fig. 7 – MIS C-F curves (a) Low frequency, (b) Intermediate frequency, (c) high frequency
        
        eqn**(29) to eqn(35
        
        High-Frequency Capacitance
        
        eqn(36) and eqn(37)
        
        Fig. 8 – In strong inversion, capacitance is a fuction of the small-signal frquency
        
        Fig. 9 – The frequency effect on C-V curve of MIS capacitor
        
        eqn(38) and eqn(39)
        
        Fig. 10 – A plot of the maximum depletion-layer width W_Dm versus the impurity concentration of semoconductors Si and GaAs
        
        eqn(40) and eqn(41)
        
        Fig. 11 – (a) Ideal C-V curves of MIS capasitor with respect to versus oxide thickness
        
        Silicon MOS Capacitor
        
        Fig. 12 Critical parameters of ideal Si-SiO₂ MOS capacitors as a function of doping level and oxide thickness
        
        Interface Traps
        
        Fig. 13 Terminology for charges associated with thermally oxidized
        
        eqn(42a) and eqn(42b)
        
        eqn(43) to eqn(48)
        
        Fig. 15 Equivalent circuits including effects of the interface trap C_u and R_u
        
        Measurement of Interface Traps
        
        Fig. 16 (a) Influence of interface traps on high-frequency and low-frequency C-V curves
        
        eqn(52) and eqn(53)
        
        High-Low Frequency Capacitance Method
        
        eqn(54) and eqn(55)
        
        Conductance Method
        
        eqn(56) to eqn(58)
        
        Fig. 17 A comparison of capacitance and conductance measurement of the MOS capacitor
        
        eqn(59)
        
        eqn(60a) and eqn(60b)
        
        Fig. 20 Variation of trap time constant 𝜏_it versus energy T=300K
        
        Fig. 23 G_p/𝜔 versus frequency for a Si-SiO₂ MOS capacitor biased in depletion region
        
        Oxide charges and Workfunction Difference
        
        eqn(61) to eqn(65)
        
        Fig. 24 (a) High-ferquency C-V curve(on p-semiconductor)
        
        eqn(62)
        
        Fig. 25 (a) For Q_f >0, the thickness of depletion layer W is smaller than that of Q_f =0
        
        eqn(63)
        
        Fig. 27 Solution concentration versus depth in SiO₂
        
        eqn(64) and eqn(65)
        
        Workfunction Difference
        
        eqn(66) and eqn(67)
        
        Fig. 28 (a) Band diagram at flat band 𝜙_ms=0
        
        Fig. 29 Colleration of (a) flat-band voltage form capacitance measurement
        
        Fig. 30 Workfunction different 𝜙_ms versus doping
        
        Fig. 31 C-V curves of a p-type MOS device
        
        Accumulation and Inversion-Layer Thickness
        
        Classical Model (CL)
        
        eqn(68) and eqn(69)
        
        Quantum-Mechanical (QM) Model
        
        Fig. 32 Classical calculation of potential and carrier profiles
        
        Fig. 33 (a) Constant energy surfaces for conduction band of Si
        
        eqn(70) and eqn**(71)
        
        Fig. 34 (a) The calculated conduction band
        
        Fig. 35 Electron concentration of an type MOS capacitor
        
        Fig. 36 Spatial distribution of electron concentration versus the different thickness of SiO₂
        
        eqn(72)
        
        Fig. 37 Average displacement of electron from the semiconductor surface as a function of applied voltage
        
        Fig. 38 For an n-type MOS capacitor with n⁺ – polysilicon gate
        
        Fig. 39 QM calculation of capacitance reduction
        
        Fig. 40 A comparison of the simulated and measured C-F curves for CL and QM Model
        
        eqn(73) and eqn(74)
        
        Carrier Transport in MOS Capacitor
        
        Carrier Transport
        
        eqn(75)
        
        Table 3 Basic Conduction Processes in Insulator**
        
        Tunneling
        
        Thermionic emission
        
        Frenkel-Poole emmison
        
        Ohmic
        
        Ionic conduction
        
        Space-charge-limited
        
        Fig. 41 Energy-band diagram showing conduction mechanism
        
        eqn(76) and eqn(77)
        
        Fig. 42 Current density versus 1/T for Si₃N₄ and SiO₂ films
        
        Fig. 43 Current voltage characteristics of Au-Si₃N₄-Si
        
        eqn(78) to eqn(85)
        
        Fig. 44 The Optimal coefficient (a)C_o (b)C₁
        
        Fig. 45 The calculated I_G using the model with the CL
        
        Nonequilibrium and Avalanche
        
        Fig. 46 Energy band diagram for s MOS Capacitor
        
        Fig. 47 Band diagram of an ideal MIS capacitor
        
        Fig. 48 Breakdown voltage of the MOS capacitor
        
        Fig 49 Electric field and the edge of the depletion region
        
        Fig 50 Capacitance and conductance versus the applied voltagefor a MOS capacitor
        
        Dielectric Breakdown
        
        eqn(86)
        
        Fig 51 Percolation theory breakdown occurs when randomly
        
        eqn(87)
        
        Fig 51 Time to breakdown t_BD versus electric field of SiO₂
        
        Fig 52 The breakdown electric field versus oxide thickness in SiO₂
        
        Problems 1 to 23
  - Bipolar Transistors
    - Introduction
    - Static Characteristic
      - Basic Current-Voltage Relationship**
      - Fig 1 Symbols and nomenclatures
      - Fig 2 Three biasing configuration of n-p-n transistor in the normal mode
      - Fig 3 An n-p-n transistor biased in the normal operating condition
        
        eqn(1) to eqn(17)**
      - Fig 4 (a) A contour plot of a cross-sectional view of a process simulated n-p-n transistor
      - Current Gain
        
        eqn(18) to eqn(34)
        
        Table 2 – Conventional Parameters for Bipolar Transistor
        
        eqn(35) to eqn(43)
      - Output Characteristics
        
        Fig 9 A plot of the measured current gain versus as a function of different collector doping concentration
        
        Fig 10 Electron-density profiles in the neutral base of an n-p-n transistor for various applied voltages
        
        Fig 11 Output characteristic of an n-p-n transistor in (a) common base configuration and (b) common-emitter configuration
        
        eqn(44) to eqn(47)
      - Nonideal Effect
        
        Emitter Bandgap Narrowing
        
        eqn(48)
        
        eqn(49a) and eqn(49b)
        
        eqn(50) and eqn(51)
        
        Kirk Effect
        
        Fig 14 Electric field distributions as a function of distance for various collector current densities
        
        eqn(52) to eqn(56)
        
        Fig 15 The space-charge region showing the effective base width widening at high current
        
        eqn(60) to eqn(62)
        
        Compact Models of Bipolar transistors
        
        The Ebers-Moll Model**
        
        eqn(63)
        
        Fig 17 An equivalent circuit model of an n-p-n bipolar transistor
        
        eqn(64) to eqn(71)**
        
        The Gummel-Poon Model**
        
        eqn(72) to eqn(77)
        
        Fig 18 An equivalent circuit diagram of Gummel-Poon model
        
        eqn(78) to eqn(88)
        
        The MEXTRAM and VIBC Models
        
        The MEXTRAM Model
        
        eqn(89)
        
        The VBIC Model
        
        The HICUM and others Models
        
        The HICUM Model
        
        Table 3**
        
        The MODELLA Model
        
        The UCSD HBT Model
        
        Fig 20 Two different equivalent circuits of a lateral p-n-p bipolar transistor
        
        Microwave Characteristics
        
        Cutoff Frequency
        
        eqn(90)
        
        Fig 21 Schematic circuits to analysis cutoff frequency
        
        eqn(91) to eqn(97)
        
        Fig 22 A reduction of base charging time by Gaussian and exponential base profiles
        
        Fig 23 Deviation of the space-charge density and width in the collector due to injected electrons
        
        eqn(98) to eqn(102**)
        
        Fig 24 (a) Cutoff frequency as a function of collector density (b)A plot 1/f_T versus 1/J_c to separate the current dependence
        
        eqn(103) and eqn(104)
        
        Fig 25 The open circles are measured cut off frequency versus the collector current
        
        Small-Signal Characterization
        
        eqn(105)
        
        Fig 26 Two-port network showing incident waves
        
        eqn(106)**
        
        Fig 27 (a) s11 and (b) s22 traces at V_BE = 0.8V and 1.0V, and V_CE = 2.0V
        
        Table 4 List of RMS Errors of s-Parameters of the Gummel-Poon and VBIC Models
        
        eqn(107) to eqn(120)
        
        Fig 28 Simplified small-signal equivalent circuits
        
        eqn(121) to eqn(124)
        
        Switching Characteristic
        
        Fig 29 (a) Q_B and J_C response to a step base-current input
        
        eqn(125) to eqn(128)
        
        eqn(125) to eqn(128)
        
        Device Geometry and Performance
        
        Fig 30 A bipolar transistor with a Schottky clamp to reduce minority-carrier injection
        
        Fig 31 Cross-section of Si bipolar transistors (a) A conventional structure (b) A modern single-poly structure with deep trench isolation
      - Related Device Structures
        
        Power Transistor
        
        High-Voltage Limit
        
        High-Current Effects
        
        Fig 32 (a) Common-emitter I-V curves showing quasi-saturation at high current and low V_CE
        
        eqn(129) to eqn(133)
        
        Thermal Runaway
        
        Second Breakdown
        
        eqn(134) and eqn(135)
        
        Fig 33 (a) Common-emitter I-V characteristics showing the second break-down at high voltage and high current
        
        Fig 34 The second-break-down triggering time versus applied pulse power for various ambient temperature T_o
        
        Safe Operating Area
        
        Fig 35 An Examaple of safety operating area (SOA) for power transistor operation
        
        eqn(136)
        
        Basic Bipolar Transistor Logic Circuits
        
        Fig 36 Logics via different bipolar integrated circuits (a) An inverter or amplifier (b) an emitter-coupled logic (c) transistor-transistor logic (d) an integrated-injection logic
        
        ECL
        
        TTL
        
        IIL
        
        BiCMOS
  - Heterojunction Bipolar Transistor
    - eqn(137) to eqn(139)
      - Fig 37 A comparison of doping profiles of homojunction and heterojunction bipolar transistors
      - Fig 38 Energy-band diagram of heterojunctionbetween a larger bandgap n-type emitter and smaller p-type base
      - Fig 39 An energy-band diagram for (a) the abrupt HBT (b) the graded HBT (c) the graded DHBT
        
        eqn(140)
  - Double-Heterojunction Bipolar Transistor
    - Fig 40 (a) Typical structure of an HBT (b) A special structure using collector-up to minimze the collector capacitance
    - Fig 41 (a) V_CE offset existing in an HBT
  - Graded-Base Bipolar Transistor**
    - eqn(141) to eqn(145)
  - Hot-Electron Transistor
    - Fig 42 The measure Early voltage versus the reciprocal temperature
    - Fig 43 (a) Electron group velocity as function of energy above the conduction band
  - Self-Heating Effects
    - Fig 44 Other form of hot-electron transistors
      - eqn(146)
    - Fig 45 Measured current gain versus the collect current with respect to the substrate temperature
    - Fig 46 A cross section view of the fabricated InGaP HBT
    - Fig 47 The measured and simulated I_C – V_CE
    - Fig 48 The OIP3 versus the collector current density
- Problems 1 to 11
MOSFETs
- Introduction
  - Field-Effect Transistors: Family Tree
    - Fig 3 The distintion between (a) FET and (b) PET
    - Fig 4 Family tree of field-effect transistor
  - Version of Field-Effect Transistors
    - Fig 5 Versions of MOSFETs their transfer (I_D_V_G) and ouput (I_D-V_D) Characteristics
- Basic Device Characteristics
  - Fig 7 (a) Schematic diagram of an n-channel enhancement-type MOSFET
  - Inversion Charge in Channel**
  - Fig 8 2-D energy-band diagrams of an n-channel MOSFET
    - eqn(1) to eqn(5)
    - Fig 9 Comparison of change distribution(in log scale) and energy band variation of an inverted p-region
    - eqn(6) to eqn(14)
    - Charge-Sheet Model
      - eqn(15) to eqn(20)
    - Current-Voltage Characteristics
      - eqn(21) to eqn(24 )
      - Constant Mobility**
        
        eqn(25)
        
        Fig 10 The position of integration from the source end to the drain end
        
        Fig 11 An ideal output characteristic of drain current versus drain voltage (I_D versus F_D)
        
        Fig 12 An n-channel MOSFET operated
        
        eqn(26) to eqn(39 ); eqn(28)**
      - Velocity-Electric-Field Relationship
        
        Fig 13 𝜈 –E relationship for n=1 and 2
        
        eqn(40)
      - Electric-Field Dependent Mobility: Two-Piece Linear Approximation
        
        eqn(45) to eqn(51)
      - Velocity Saturation
        
        eqn(52) to eqn(54)
        
        Fig 14 A comparison of I-V characteristic for (a) constant mobility (b) the velocity saturation
      - Ballistic Transport
        
        eqn(55) to eqn(60)
        
        Fig 16 Injection velocity v_inj and inversion charge
        
        eqn(59) and eqn(60)
    - Threshold Voltage
      - eqn(61) to eqn(63)
    - Subthreshold Region
      - Fig 17 A plot of the dependent relation between deltaV_T
      - Fig 18 Transfer characteristics (I_D versus V_G)
        
        eqn(64) and eqn(65)
      - Fig 19 A zoom in plot of Fig 9b
        
        eqn(66) to eqn(70)
      - Fig 20 Experimental subtreshold characteristic
      - Fig 21 The subtreshold swing versus a with respect to different substrate reverse bias.
        
        eqn(71) to eqn(74)
      - Fig 22 Theoretical (dots) and experimental (solid lines) drain characteristic of a p-MOSFET with d=200
      - Mobility Behavior
      - eqn(75)
      - Fig 23 Electron and hole inversion-layer mobilities
      - Fig 24 Electron surface drift velocity versus longitudinal field
      - Temperature Dependence
        
        eqn(76) to eqn(80*)
      - Fig 25 The calculated lattice temperature shift of a 0.5𝜇m n-type MOSFET
        
        eqn(79) and eqn(80)
      - Fig 26 The threshold-voltage shift(dV_T/dT)
      - Fig 27 Experimental measurement of deltaV_T versus temperature
      - Fig 28 Plot of the computed subthresfold of the 0.5𝜇m n-type MOSFET
      - Nonuniform Doping and Buried-Channel Device
        
        Fig 29 Plot I_D versus VG curves of the 1.5𝜇m n-MOSFET
        
        Fig 30 Nonuniform channel doping profiles N(x) deep from the surface of channel to the substrate
        
        eqn(81) and eqn(82)
        
        High-Low Doping Profile
        
        eqn(83) to eqn(104)
        
        Low-High Doping Profile
        
        eqn(105) and eqn(106)
        
        Buried-Channel Device
        
        eqn(107) and eqn(110)
        
        Table 1** – List of Drain Current Equations
        
        eqn(111 and eqn(112)
      - Device Scalling and Short-Channel Effects
        
        Device Scalling
        
        eqn(113) and eqn(114)
        
        Charge Sharing from Source/Drain
        
        eqn(115) to eqn(123)
        
        eqn(124a and eqn(124b)
        
        Channel-Length Modulation
        
        Drain-Induced Barrier Lowering (DIBL)
        
        eqn(125) and eqn(126)
        
        Characteristic Fluctuation
        
        eqn(127) and eqn(128)
        
        Multiplication and Oxide Reliability
        
        eqn(129) to eqn(132)
      - Mosfet Structures
        
        Channel Doping Profile
        
        Gate Stack
        
        eqn(133)
        
        Source/Drain Design
        
        Schottky-Barrier Source/Drain
        
        Raised Source/Drain
        
        SOI and TFT
        
        SOI
        
        TFT
        
        eqn(134) and eqn(135)
        
        Three-Dimensional Structures
        
        Power MOSFETs
        
        DMOS
        
        LDMOS
      - Circuit Applications
        
        Compact Models of MOSFETs
        
        Equivalent Circuit and Microwave Performance
        
        eqn(136) and eqn(137)
        
        **eqn()
        
        eqn(138) to eqn(143)
        
        Basic Circuit Blocks
        
        eqn(144)
      - NCFET and TFET
        
        Negative-Capasitance Field-Effect Transistor
        
        eqn(145)
        
        Tunneling Field-Effect Transistor
        
        eqn(146)
        
        Fig. 81
      - Single-Electron Transistor
        
        eqn(147) to eqn(159)
Nonvolatile Memory Devices
- Introduction
  - Mask-Programmed ROM
  - PROM
  - EPROM
  - Flash EEPROM
  - EEPROM
  - Nonvolatile RAM
- The Concept of Floating Gate
  - eqn(1) to eqn(6)
- Device structures
  - The Floating-Gate Memory
  - The Floating Trap of Charge-Trapping Memory
    - eqn(7) to eqn(9)
- Compact Model of Floating-Gate Memory Cells
  - The Classical Capacitive Model
    - eqn(11) to eqn(17)
  - The Charge-Balance Model
    - eqn(18) and eqn(19)
- Multi-Level Cells and 3-Dimensional Structures
  - Multi-Level Cells
    - Precise Control of the Amount of Charge Prorammed into the Memory Cell
    - Precise Voltage or Current Sensing Circuit
    - Stable Charges Sustenance of Long Retention
  - 3-Dimensional (3-D) Structures